A parallel block implementation of level 3 BLAS for MIMD vector processors

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Persistent URL	http://purl.org/net/epubs/work/25468
Record Status	Checked
Record Id	25468
Title	A parallel block implementation of level 3 BLAS for MIMD vector processors
Contributors	MJ Dayde, Iain S Duff (SERC Rutherford Appleton Lab.), A Petitet
Abstract
Organisation	CSE , CSE-NAG , SERC
Keywords
Funding Information
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Language	English (EN)

Type	Details	URI(s)	Local file(s)	Year
Report	RAL Technical Reports RAL-93-037. SERC, 1993.			1993
Report	CERFACS TR/PA/92/74. 1992.		dadpCERFACS9274.pdf	1992